Electronics packaging has become a major discipline within the field of electronic engineering. Some educational institutions, including the University of Maryland, offer graduate programs in electronics packaging. The American Society of Mechanical Engineers even publishes a Journal of Electronic Packaging. The packaging of modem electronics often must address multiple issues apart from the packaging envelope, including cooling adequacy, the potential for mechanical damage, radio frequency noise emission, protection from electrostatic discharge, accessibility and maintenance, cost, etc.
The demand for improved electronics packaging is very high in many areas, including many military applications where space and weight considerations are critical, particularly for aerospace vehicles.
The packaging of certain electronic systems is found in a number of U.S. Patents. For example, U.S. Pat. No. 4,631,636 to Andrews is for a high density packaging arrangement for electronics systems, where circuit board assemblies are provided with electronic components on one side and cooling tubes on the other side.
U.S. Pat. No. 4,841,355 to Parks is for a three-dimensional microelectronic package for semiconductor chips.
U.S. Pat. No. 5,181,167 to Davidson is for a stacking heatpipe for three dimensional electronic packaging.
U.S. Pat. No. 9,320,182 to Steger is for a modular liquid-cooled power semiconductor module.
The disclosed apparatus offers improvements upon prior art electronics packaging and heat transfer arrangements.
It is noted that citing herein of any patents, published patent applications and non-patent literature is not an admission as to any of those references constituting prior art with respect to the herein disclosed apparatus.